Because the length of the gate can not be limitlessly reduced any more and new materials have not been proved to be used in a metal-oxide-semiconductor field-effect transistor (MOSFET), adjusting mobility has become an important role to improve the performance of the integrated circuit. For example, the lattice strain of the channel is widely applied to increase mobility during the process of fabricating the MOSFET. For example, the hole mobility of the silicon with the lattice strain can be 4 times as many as the hole mobility of the silicon without the lattice strain, and the electron mobility with the lattice strain can be 1.8 times as many as the electron mobility of the silicon without the lattice strain.
Consequently, a tensile stress can be applied to an n-channel of an n-channel metal-oxide-semiconductor field-effect transistor (NMOS) by changing the structure of the transistor, or a compressive stress can be applied to a p-channel of a p-channel metal-oxide-semiconductor field-effect transistor (PMOS) by changing the structure of the transistor. In a case that the channel is stretched, the electron mobility can be improved. Whereas, in a case that the channel is compressed, the hole mobility is improved. Generally, a silicon nitride (SiN) film is formed after the components of the MOSFET are finished. The silicon nitride film has a characteristic of high stress that is used for controlling the stress in the channel.
According to various depositing conditions, the silicon nitride film can be controlled to have the function of a tensile stress film or a compressive stress film. For example, the compressive stress film for increasing the hole mobility of the P-channel may be simply formed by a chemical vapor deposition (CVD) process. Whereas, the tensile stress film for increasing the electron mobility of the N-channel is formed by a plurality of deposition and curing cycle processes.
Therefore, there is a need of providing a stress film forming method and a stress film structure for use in the fabrication process of a complementary metal-oxide-semiconductor (CMOS).